Zest Academy

Binary Number Systems

26 questions (Q1-Q26)

Basic Gates & Boolean Algebra

45 questions (Q27-Q71)

Combinational Logic

58 questions (Q72-Q129)

Sequential Circuits & FSM

16 questions (Q130-Q145)

Setup Time & Hold Time

13 questions (Q146-Q158)

Counters & Shift Registers

29 questions (Q159-Q187)

Fault Analysis & Hazards

19 questions (Q188-Q206)

Digital Integrated Circuits

28 questions (Q207-Q234)

Memory & Programmable Devices

20 questions (Q235-Q254)

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Digital Electronics Interview Questions & Answers

Q1: Define: (a) bit (b) nibble (c) byte (d) word

Q2: What is weighted code? Give example.

Q3: Give an example for Non-weighted code?

Q4: What is the key feature of Excess-3 code?

Q5: In how many different ways can number 5 be represented using 2-4-2-1 code?

Q6: What are all the BCD numbers that can be uniquely represented in 2-4-2-1 weighted code?

Q7: How many unused combinations are there in the representation of BCD numbers using 7-4-2-1 weighted scheme? What are they?

Q8: What is the condition for a weighted code to be self-complementary?

Q9: Convert the binary number 011101010001 to octal and hexadecimal?

Q10: Formulate a simple procedure for converting base-3 numbers to base-9?

Q11: Convert (211101222211122)3 to base-9? 2/109

Q12: A number N has ‘n’ digits in a r-radix number system. What is its (r-1)’s complement and r’s complement?

Q13: What is the 9’s complement of the BCD number 752?

Q14: Convert the Gray code number 11001 to binary code?

Q15: Give the procedure for converting a binary number to Gray code?

Q16: Represent 45 in the number systems (a) binary (b) BCD (c) Excess-3 (d) Gray code

Q17: Give the range of the numbers that can be represented using n bits in 2’s complement method?

Q18: What is the minimum number of bits required to represent the numbers in the range of -5 to 23 using 2’s complement method?

Q19: What will be the result if all the zeros are retained from LSB side until 1 is seen, including that 1, and complement all the following bits of a binary number?

Q20: In a particular design which uses 5 bits for integral part and 7 bits for fractional part,the result of some operation is 7B8 hex. Find the corresponding decimal equivalent?

Q21: Convert 0.95 to its binary equivalent?

Q22: AB16 – 3E16 = ? 4/109

Q23: Solve for x: (70)8 + (122)6 = (211)x?

Q24: Solve for X in (135)12 = (X)8 + (78)9?

Q25: Explain the detailed procedure for BCD addition?

Q26: Perform BCD addition: (1001) + (0110)?

Q27: Which gates are called universal gates? Why? 5/109

Q28: How many minterms or maxterms will be there for n-inputs?

Q29: Give the minterm and maxterms corresponding to 6 and 15 numbers (4-inputs)?

Q30: In how many ways can a NAND gate be converted into an inverter? Show all the possibilities?

Q31: How many number of 2 input AND gates are required to generate N I/P AND gate?

Q32: State De-Morgan’s Laws?

Q33: (a) If it is given that A & B will not be 1 at the same time, what will be the equivalent logical gate for an XOR gate? (b) If any of the inputs of an XOR gate are inverted, XOR gate will work as ----- ? 6/109

Q34: State the Shannon’s expansion theorem for representing a Boolean function by its co-factors?

Q35: Write the cofactors FA and FA’ for F(A,B,C,D) = ABD + BCD’ + A’B’C’ ?

Q36: How many unique Boolean functions can exist for ‘n’ number of inputs?

Q37: Mention the logical gates for which the 3 input implementation can not be obtained from two 2 input gates? How do you implement them?

Q38: What is OUT in the circuit shown below? 7/109

Q39: Give implementation of XOR using minimum number of NAND gates?

Q40: Majority function is the one which gives 1 if the input has more 1s than 0s. Show the truth table and give the AOI for 3-input majority function? 8/109

Q41: N number of XNOR gates are connected as shown below. How does this circuit work? Explain?

Q42: Show the implementation of XNOR gate using minimum number of NOR Gates?

Q43: Explain parity generation and its significance?

Q44: Which logical gates can be used as parity generators?

Q45: What is the parity of (i) 10111001 (ii) 11001010

Q46: Give a circuit for 4-bit even parity checker? And explain the same how can it be reused for parity generation? 10/109

Q47: Design a combinational circuit using XOR gates that converts a 4-bit gray code number to a 4-bit binary number?

Q48: Which logical gate can be used to find out whether the two single bit inputs are equal or not?

Q49: What is the difference between NAND gate and negative AND gate?

Q50: How to obtain the dual of a Boolean equation?

Q51: Define: SOP from and POS form? 12/109

Q52: When is a SOP/POS form is called standard or canonical?

Q53: Write the POS from for a 3-input XNOR gate? Is it canonical?

Q54: Which form is suitable for designing logic circuits using (a) Only NAND gates (b) Only NOR gates

Q55: In which order are the bits arranged while drawing K-Maps?

Q56: Why do we write 00 01 11 10 in that order while Drawing K-maps?

Q57: How many cells will a n-input variable have in K-Map?

Q58: How many dimensions (without projections) are there for n karnaugh map (n>2)?

Q59: What do you mean by don’t care condition?

Q60: Y = A'C + AC'B' and you are given that A=C=1 will never occur. Simplify Y?

Q61: Y = ∑ ( 0,2,3,4,9,10,12,13) = d (6,8,14) .Simplify using KMap. Mention Prime Implicants & Essential Prime Implicants?

Q62: Y = F(A,B,C,D) = ∑ (0,1,4,5,7,9,12). Express the same using П ? = d (6,8,14) .Simplify using KMap. Mention Prime Implicants & Essential Prime Implicants?

Q63: If F(A,B,C,D,E) = B’E, how many terms will be there in the standard or canonical SOP representation of F?

Q64: In a 6 variable K-map, how many literals will the grouping of 4 adjacent cells give in the term?

Q65: Generalization of Q13: The grouping of k adjacent cells, in a N variable K-Map will lead to a term of ----- literals?

Q66: If the number of variables are more,(>5) , which method is suitable for Boolean simplification?

Q67: In the simplification of a Boolean function, F = ∑ (0,1,2,6,7,8,9,10,14,15) using QM method the following table is obtained: Q1) Define: SOP from and POS form?

Q68: In the simplification of a Boolean function, F = ∑ (0,1,2,6,7,8,9,10,14,15) using QM method the following table is obtained: Q1) Define: SOP from and POS form?

Q69: Use K-Map to simplify F = ∑ (0,1,2,6,7,8,9,10,14,15) in SOP from? Cross check the essential prime Implicants that are obtained in Q17.

Q70: Simplify the Boolean function Y = ∑ ( 0,2,3,5,7,10,11,15) in POS form using KMap?

Q71: Give the AND-OR implementation of a circuit, using minimum gates, that gives HIGH when the input is BCD equivalent of 5,7 or 9 and LOW otherwise. ?

Q72: (a) Show the AOI implementation of a 2:1 Mux? (b) Convert this to 2-input NAND implementation?

Q73: Design the following gates using minimum number of 2:1 Muxes? (a) NOT (b) AND (c) OR (d) XOR

Q74: Construct a 16:1 Mux with two 8:1 Mux and one 2:1 Mux.

Q75: Find out the simplified expression for Y in terms of A, B and C?

Q76: Design a circuit for 3-input majority function using a 4:1 Mux?

Q77: (a) Expand the Boolean function f(x,y,z) = x’z’ + xy + xz in terms of x? (b) Implement f using a 2:1 Mux and external gates?

Q78: There is a single telephone which needs to transmit the data from 8 different users to the receiving end. Give a design which can accomplish this task?

Q79: You are given a 2:4 decoder, a 2 input OR gate and a 3 input OR gate. Using these components design a system which takes A & B as inputs and generates the following four outputs: AB, (AB)' , A+B, (A+B)'.